FPGA RTL Design Engineer
NarendraJobs
Full Time
Ahmedabad, Bengaluru/Bangalore, Hyderabad, Pune
Posted 3 years ago
Experience:2+ Years
Location: Pune/Ahmedabad/Bangalore
Job Description:
- 2+ Years of Experience in working with FPGAs (Altera or Xilinx)
- Architecture design for FPGA logics
- Minimum 2 Years of experience on RTL Coding in VHDL or Verilog
- FPGA simulation using Modelsim or other simulation tools
- Testing FPGA on board
- Debugging FPGA issues