Experience: 3-25 Years

Location: PAN India and Abroad (USA, Canada, UK , Sweden , Germany , Romania ,France, Ireland-Dublin ,Israel ,JAPAN, South Korea, Singapore, Malaysia, China, Taiwan )

Job Description1:

• Working experience in System Verilog and OVM/UVM methodologies. (UVC creation, integration, SV coverage, SV assertions, SV constraints, UVM sequences etc)
• Should have IP/Sub-System level verification experience.
• Develop verification plan, Build complex test-bench environments and identifying corner case scenarios, exposing Arch/corner case bugs and closing coverage
• Experience with coverage driven verification methodologies.
• Experience with High Speed Interfaces- USB, DP/eDP, PCIE, DSI, CSI,
• Knowledge in AMBA bus protocols  APB, AHB & AXI
• Experience with creating & working with Scalable and Reusable test-bench.
• Must have excellent knowledge of ASIC Verification Flow
• Excellent debug  and problem solving skills ( Should be able to reach to root-cause issues)
• Familiarity with scripting languages likes Perl, Python
• Bug tracking – JIRA/CQ
• Experience on any revision tracking tool – Perforce, SVN, CVS
• Team player, can-do attitude is desirable
• Good communication skills.

Job Description2:

• Good understanding of Arm Based SoCs
  • SoC Bus backbone ( ARM NIC, CCN, Bridges, DRAM memory controllers and cache coherency concepts)
  • SoC bus components like MMU, Quality Enhancer.
  • Good understanding of SoC Power Management and Clock management.
  • Experience in at least ONE of these blocks: Amba, Bus Interconnect, Memory interface ( DRAM and LPDDR4 ), PCIE, Ethernet, CAN, UFS, eMMC , Camera MIPI CSI/DSI, DP, ISP, USB, Security Subsystem including ARM TrustZone, GPU, Audio, Video, ARM CPU and Design For Debug ( DFD), peripherals interfaces – UART, I2C, I2S, SPI, flash memory interfaces verification at sub-system/Full-chip level.
  • Experience with SOC Bus protocols: AMBA Bus interfaces (AXI, AHB, APB) and/or OCP highly desirable.
• Must have excellent knowledge of ASIC Verification Flow
• Experience with current verification methodologies (UVM, OVM, VMM, Specman, …)
• Should have SoC level verification experience. ( Build complex testbench environments and identifying corner case scenarios and exposing Arch/corner case bugs)
• Experience in power aware and Low Power management verification.
• Experience in Performance Verification with Emulators is plus.
• Experience with coverage based verification methodologies.
• Excellent debug skills in both functional ( Should be able to Rootcause the issue)
• Familiarity with scripting languages likes Perl, Phython
• Experience with setting up and running gate level simulations